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50 mhz to 6 ghz trupwr detector adl5501 rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006C2009 analog devices, inc. all rights reserved. features true rms response excellent temperature stability up to 30 db input dynamic range 50 input impedance 1.25 v rms, 15 dbm, maximum input single-supply operation: 2.7 v to 5.5 v low power: 3.3 mw at 3 v supply rohs-compliant applications measurement of cdma-, cdma2000-, w-cdma-, and qpsk-/ qam-based ofdm, and other complex modulation waveforms rf transmitter or receiver power measurement 5 0.03 0.1 1 ?25 ?20 ?15 ?10 ?5 0 5 10 15 output (v) input (dbm) 06056-001 figure 1. output vs. input level, supply = 3 v, frequency = 1.9 ghz general description the adl5501 is a mean-responding trupwr? power detector for use in high frequency receiver and transmitter signal chains from 50 mhz to 6 ghz. it is easy to apply, requiring only a single supply between 2.7 v and 5.5 v and a power supply decoupling capacitor. the input is internally ac-coupled and has a nominal input impedance of 50 . the output is a linear-responding dc voltage with a conversion gain of 6.3 v/v rms at 900 mhz. the adl5501 is intended for true power measurement of simple and complex waveforms. the device is particularly useful for measuring high crest factor (high peak-to-rms ratio) signals, such as cdma-, cdma2000-, w-cdma-, and qpsk-/qam- based ofdm waveforms. the on-chip modulation filter provides adequate averaging for most waveforms. the on-chip, 100 series resistance at the output, combined with an external shunt capacitor, creates a low-pass filter response that reduces the residual ripple in the dc output voltage. for more complex waveforms, an external capacitor at the fltr pin can be used for supplementary signal demodulation. the adl5501 offers excellent temperature stability across a 30 db range and near 0 db measurement error across temperature over the top portion of the dynamic range. in addition to its temperature stability, the adl5501 offers low process variations that further reduce calibration complexity. the adl5501 operates from ?40c to +85c and is available in a small 6-lead sc-70 package. it is fabricated on a proprietary high f t silicon bipolar process. functional block diagram rfin buffer vpos vrms comm error amp x 2 x 2 i i trans- condictance cells adl5501 100 ? fltr band-gap reference enbl internal filter capacitor 0 6056-002 figure 2.
adl5501 rev. b | page 2 of 2 8 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? general description ......................................................................... 1 ? functional block diagram .............................................................. 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? absolute maximum ratings ............................................................ 9 ? esd caution .................................................................................. 9 ? pin configuration and function descriptions ........................... 10 ? typical performance characteristics ........................................... 11 ? circuit description ......................................................................... 17 ? filtering ........................................................................................ 17 ? applications information .............................................................. 18 ? basic connections ...................................................................... 18 ? output swing .............................................................................. 18 ? linearity ....................................................................................... 18 ? input coupling using a series resistor ................................... 19 ? multiple rf inputs ..................................................................... 19 ? selecting the square-domain filter and output low-pass filter ............................................................................................. 19 ? power consumption, enable, and power-on/power-off response time ............................................................................ 20 ? output drive capability and buffering ................................... 21 ? vrms output offset ................................................................. 21 ? device calibration and error calculation .............................. 22 ? calibration for improved accuracy ......................................... 22 ? drift over a reduced temperature range .............................. 23 ? operation below 100 mhz ....................................................... 23 ? evaluation board ........................................................................ 23 ? outline dimensions ....................................................................... 25 ? ordering guide .......................................................................... 25 ? revision history 3/09rev. a to rev. b change to features ........................................................................... 1 changes to table 1 ............................................................................ 3 changes to figure 4, figure 5, figure 7, and figure 9 ............... 10 deleted figure 17 and figure 21; renumbered sequentially ... 12 changes to figure 18 and figure 21 ............................................. 13 changes to figure 36 and figure 39 ............................................. 16 changes to figure 42 ...................................................................... 18 changes to operation below 100 mhz section ......................... 23 deleted figure 56 ............................................................................ 22 deleted figure 57 ............................................................................ 23 10/07rev. 0 to rev. a changes to general description ..................................................... 1 changes to table 1 ............................................................................. 3 changes to figure 30, figure 32, and figure 33 ......................... 14 changes to figure 35, figure 37, and figure 38 ......................... 15 changes to circuit description section ...................................... 16 changes to layout and operation below 100 mhz and above 4.0 ghz section .................................................................. 22 inserted figure 56 ........................................................................... 22 inserted figure 57 ........................................................................... 23 changes to figure 58 ...................................................................... 23 deleted figure 57 and figure 58 .................................................. 24 changes to figure 59 and figure 60............................................. 24 9/06revision 0: initial version
adl5501 rev. b | page 3 of 28 specifications t a = 25c, v s = 3.0 v, c fltr = open, c out = 100 nf, unless otherwise specified. table 1. parameter condition min typ max unit frequency range input rfin 50 6000 mhz rms conversion (f = 50 mhz) input rfin to output vrms input impedance 87||6.9 ||pf input return loss 11.0 db dynamic range 1 cw input, ?40c < t a < +85c 1 db error 2 v s = 3 v 25 db v s = 5 v 26 db 2 db error 2 v s = 3 v 32 db v s = 5 v 35 db maximum input level 1 db error 2 8 dbm minimum input level 1 db error 2 ?18 dbm conversion gain v out = (gain v in ) + intercept 4.5 v/v rms output intercept 3 0.03 v output voltagehigh power in p in = 5 dbm, 400 mv rms 1.81 v output voltagelow power in p in = ?21 dbm, 20 mv rms 0.11 v temperature sensitivity p in = ?5 dbm 25c t a 85c 0.0039 db/c ?40c t a +25c ?0.0037 db/c rms conversion (f = 100 mhz) inp ut rfin to output vrms input impedance 78||4.2 ||pf input return loss 12.6 db dynamic range 1 cw input, ?40c < t a < +85c 0.25 db error 4 delta from 25c, v s = 5 v 28 db 0.25 db error 2 v s = 3 v 19 db v s = 5 v 20 db 1 db error 2 v s = 3 v 23 db v s = 5 v 27 db 2 db error 2 v s = 3 v 26 db v s = 5 v 30 db maximum input level 1 db error 2 6 dbm minimum input level 1 db error 2 ?18 dbm conversion gain v out = (gain v in ) + intercept 6.1 v/v rms v s = 5 v 5.6 7.8 v/v rms output intercept 3 0.03 v v s = 5 v ?0.02 +0.1 v output voltagehigh power in p in = 5 dbm, 400 mv rms 2.47 v output voltagelow power in p in = ?21 dbm, 20 mv rms 0.13 v temperature sensitivity p in = ?5 dbm 25c t a 85c 0.0028 db/c ?40c t a +25c ?0.0018 db/c
adl5501 rev. b | page 4 of 28 parameter condition min typ max unit rms conversion (f = 450 mhz) inp ut rfin to output vrms input impedance 63||1.4 ||pf input return loss 16.0 db dynamic range 1 cw input, ?40c < t a < +85c 0.25 db error 4 delta from 25c, v s = 5 v 32 db 0.25 db error 2 v s = 3 v 20 db v s = 5 v 24 db 1 db error 2 v s = 3 v 25 db v s = 5 v 29 db 2 db error 2 v s = 3 v 28 db v s = 5 v 33 db maximum input level 1 db error 2 5 dbm minimum input level 1 db error 2 ?20 dbm conversion gain v out = (gain v in ) + intercept 7.1 v/v rms output intercept 3 0.03 v output voltagehigh power in p in = 5 dbm, 400 mv rms 2.81 v output voltagelow power in p in = ?21 dbm, 20 mv rms 0.15 v temperature sensitivity p in = ?5 dbm 25c t a 85c 0.0016 db/c ?40c t a +25c ?0.0002 db/c rms conversion (f = 900 mhz) inp ut rfin to output vrms input impedance 52||0.9 ||pf input return loss 17.5 db dynamic range 1 cw input, ?40c < t a < +85c 0.25 db error 4 delta from 25c, v s = 5 v 33 db 0.25 db error 2 v s = 3 v 20 db v s = 5 v 23 db 1 db error 2 v s = 3 v 24 db v s = 5 v 27 db 2 db error 2 v s = 3 v 27 db v s = 5 v 30 db maximum input level 1 db error 2 6 dbm minimum input level 1 db error 2 ?18 dbm conversion gain v out = (gain v in ) + intercept 6.3 v/v rms output intercept 3 0.03 v output voltagehigh power in p in = 5 dbm, 400 mv rms 2.53 v output voltagelow power in p in = ?21 dbm, 20 mv rms 0.14 v temperature sensitivity p in = ?5 dbm 25c t a +85 c 0.0019 db/c ?40c t a +25c ?0.0002 db/c
adl5501 rev. b | page 5 of 28 parameter condition min typ max unit rms conversion (f = 1900 mhz) inp ut rfin to output vrms input impedance +33||?0.1 ||pf input return loss 15 db dynamic range 1 cw input, ?40c < t a < +85c 0.25 db error 4 delta from 25c, v s = 5 v 32 db 0.25 db error 2 v s = 3 v 5 db v s = 5 v 7 db 1 db error 2 v s = 3 v 25 db v s = 5 v 29 db 2 db error 2 v s = 3 v 28 db v s = 5 v 32 db maximum input level 1 db error 2 7 dbm minimum input level 1 db error 2 ?19 dbm conversion gain v out = (gain v in ) + intercept 5.5 v/v rms output intercept 3 0.02 v output voltagehigh power in p in = 5 dbm, 400 mv rms 2.20 v output voltagelow power in p in = ?21 dbm, 20 mv rms 0.12 v temperature sensitivity p in = ?5 dbm 25c t a 85c 0.0031 db/c ?40c t a +25c ?0.0034 db/c rms conversion (f = 2350 mhz) inp ut rfin to output vrms input impedance +32||?0.3 ||pf input return loss 13.6 db dynamic range 1 cw input, ?40c < t a < +85c 0.25 db error 4 delta from 25c, v s = 5 v 8 db 0.25 db error 2 v s = 3 v 4 db v s = 5 v 7 db 1 db error 2 v s = 3 v 25 db v s = 5 v 29 db 2 db error 2 v s = 3 v 29 db v s = 5 v 32 db maximum input level 1 db error 2 8 dbm minimum input level 1 db error 2 ?18 dbm conversion gain v out = (gain v in ) + intercept 5.0 v/v rms output intercept 3 0.02 v output voltagehigh power in p in = 5 dbm, 400 mv rms 2.00 v output voltagelow power in p in = ?21 dbm, 20 mv rms 0.10 v temperature sensitivity p in = ?5 dbm 25c t a 85c 0.0032 db/c ?40c t a +25c ?0.0044 db/c
adl5501 rev. b | page 6 of 28 parameter condition min typ max unit rms conversion (f = 2700 mhz) inp ut rfin to output vrms input impedance +35||?0.5 ||pf input return loss 13 db dynamic range 1 cw input, ?40c < t a < +85c 0.25 db error 4 delta from 25c, v s = 5 v 5 db 0.25 db error 2 v s = 3 v 3 db v s = 5 v 7 db 1 db error 2 v s = 3 v 25 db v s = 5 v 30 db 2 db error 2 v s = 3 v 28 db v s = 5 v 33 db maximum input level 1 db error 2 8 dbm minimum input level 1 db error 2 ?17 dbm conversion gain v out = (gain v in ) + intercept 4.6 v/v rms output intercept 3 0.02 v output voltagehigh power in p in = 5 dbm, 400 mv rms 1.84 v output voltagelow power in p in = C21 dbm, 20 mv rms 0.09 v temperature sensitivity p in = C5 dbm 25c t a 85c 0.0034 db/c ?40c t a +25c ?0.0049 db/c rms conversion (f = 4000 mhz) inp ut rfin to output vrms input impedance +41||?0.1 ||pf input return loss 20.8 db dynamic range 1 cw input, ?40c < t a < +85c 0.25 db error 4 delta from 25c, v s = 5 v 5 db 0.25 db error 2 v s = 3 v 4 db v s = 5 v 5 db 1 db error 2 v s = 3 v 28 db v s = 5 v 31 db 2 db error 2 v s = 3 v 30 db v s = 5 v 33 db maximum input level 1 db error 2 10 dbm minimum input level 1 db error 2 ?18 dbm conversion gain v out = (gain v in ) + intercept 3.8 v/v rms output intercept 3 0.01 v output voltagehigh power in p in = 5 dbm, 400 mv rms 1.53 v output voltagelow power in p in = C21 dbm, 20 mv rms 0.07 v temperature sensitivity p in = C5 dbm 25c t a 85c 0.0019 db/c ?40c t a +25c ?0.0043 db/c
adl5501 rev. b | page 7 of 28 parameter condition min typ max unit rms conversion (f = 5000 mhz) inp ut rfin to output vrms input impedance +51||?0.2 ||pf input return loss 17 db dynamic range 1 cw input, ?40c < t a < +85c 0.25 db error 4 delta from 25c, v s = 5 v 5 db 0.25 db error 2 v s = 3 v 5 db v s = 5 v 5 db 1 db error 2 v s = 3 v 31 db v s = 5 v 35 db 2 db error 2 v s = 3 v 34 db v s = 5 v 38 db maximum input level 1 db error 2 15 dbm minimum input level 1 db error 2 ?20 dbm conversion gain v out = (gain v in ) + intercept 3.3 v/v rms output intercept 3 0.02 v output voltagehigh power in p in = 5 dbm, 400 mv rms 1.33 v output voltagelow power in p in = C21 dbm, 20 mv rms 0.08 v temperature sensitivity p in = C5 dbm 25c t a 85c 0.0001 db/c ?40c t a +25c ?0.0031 db/c rms conversion (f = 6000 mhz) inp ut rfin to output vrms input impedance +86||?0.1 ||pf input return loss 10.1 db dynamic range 1 cw input, ?40c < t a < +85c 0.25 db error 4 delta from 25c, v s = 5 v 25 db 0.25 db error 2 v s = 3 v 20 db v s = 5 v 20 db 1 db error 2 v s = 3 v 31 db v s = 5 v 31 db 2 db error 2 v s = 3 v 35 db v s = 5 v 35 db maximum input level 1 db error 2 14 dbm minimum input level 1 db error 2 ?17 dbm conversion gain v out = (gain v in ) + intercept 2.4 v/v rms output intercept 3 0.02 v output voltagehigh power in p in = 5 dbm, 400 mv rms 0.97 v output voltagelow power in p in = C21 dbm, 20 mv rms 0.07 v temperature sensitivity p in = C5 dbm 25c t a 85c 0.0017 db/c ?40c t a +25c ?0.0008 db/c
adl5501 rev. b | page 8 of 28 parameter condition min typ max unit output offset no signal at rfin 50 150 mv enable interface pin enbl logic level to enable power, high condition 2.7 v v s 5.5 v, ?40c < t a < +85c 1.8 v pos v input current when high 2.7 v at enbl, C40c t a +85c 0.05 0.1 a logic level to disable power, low condition 2.7 v v s 5.5 v, ?40c < t a < +85c C0.5 +0.5 v power-up response time 5 c fltr = c out = open, 0 dbm at rfin 6 s c fltr = 1 nf, c out = open, 0 dbm at rfin 21 s c fltr = open, c out = 100 nf, 0 dbm at rfin 28 s power supplies operating range ?40c < t a < +85c 2.7 5.5 v quiescent current no signal at rfin 6 1.1 ma total supply current when disabled no signal at rfin, enbl input low 0.1 <5 a 1 the available output swing and, therefore, the dynamic ra nge are altered by the supply voltage; see figure 8. 2 error referred to best-fit line at 25c. 3 calculated using linear regression. 4 error referred to delta from 25c response; see figure 13, figure 14, figure 15, figure 19, figure 20, and figure 21. 5 the response time is measured from 10% to 90% of settling level; see figure 30. 6 supply current is input-level dependent; see figure 6.
adl5501 rev. b | page 9 of 28 absolute maximum ratings table 2. parameter rating supply voltage v s 5.5 v vrms 0 v, v s rfin 1.25 v rms equivalent power, re: 50 15 dbm internal power dissipation 80 mw ja (sc-70) 494c/w maximum junction temperature 125c operating temperature range ?40c to +85c storage temperature range ?65c to +150c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
adl5501 rev. b | page 10 of 28 pin configuration and fu nction descriptions 1 vpos 6 vrms 2 fltr 5 enbl 3 rfin 4 comm adl5501 top view (not to scale) 06056-003 figure 3. pin configuration table 3. pin function descriptions pin o. nemonic description 1 vpos supply voltage pin. operational range 2.7 v to 5.5 v. 2 fltr square-domain filter pin. connection for an external ca pacitor to lower the corner frequency of the square- domain (or modulation) filter. capaci tor is connected between fltr and v s and forms a low-pass filter with an 8 k on-chip resistor. the on-chip capacitor provides fi ltering with an approximate 100 khz corner frequency. for simple waveforms, no further filtering of the demodulated signal is required. 3 rfin signal input pin. internally ac-coupled after internal termination resistance. nominal 50 input impedance. 4 comm device ground pin. 5 enbl enable pin. connect pin to v s for normal operation. connect pin to ground for disable mode for a supply current less than 1 a. 6 vrms output pin. rail-to-rail voltage output with limited 3 ma current drive capability. the output has an internal 100 series resistance. high resistive load s are recommended to preserve output swing.
adl5501 rev. b | page 11 of 28 typical performance characteristics t a = 25c, v s = 5.0 v, c fltr = open, c out = 100 nf, colors: black = +25c, blue = ?40c, red = +85c, unless otherwise noted. 10 0.03 0.1 1 ?25 ?20 ?15 ?10 ?5 0 5 10 15 output (v) input (dbm) 06056-004 100mhz 450mhz 900mhz 1900mhz 2350mhz 2700mhz 4000mhz 5000mhz 6000mhz figure 4. output vs. input level; frequencies = 100 mhz, 450 mhz, 900 mhz, 1900 mhz, 2350 mhz, 2700 mhz, 4000 mhz, 5000 mhz, and 6000 mhz; supply = 5.0 v 6 5 4 3 2 1 0 01 . 4 1.2 1.0 0.8 0.6 0.4 0.2 output (v) input (v rms) 06056-005 100mhz 450mhz 900mhz 1900mhz 2350mhz 2700mhz 4000mhz 5000mhz 6000mhz figure 5. output vs. input level (linear scale); frequencies = 100 mhz, 450 mhz, 900 mhz,1900 mhz, 2350 mhz, 2700 mhz, 4000 mhz, 5000 mhz, and 6000 mhz; supply = 5.0 v 12 11 10 9 8 7 6 5 4 3 2 1 0 00 0.80.7 0.6 0.50.40.30.20.1 supply current (ma) input (v rms) . 9 3.0v 5.0v 06056-006 figure 6. supply current vs. input level; supplies = 3.0 v and 5.0 v; temperatures = ?40c, +25c, and +85c 3 2 1 0 ?1 ?2 ?3 ?25 15 10 50 ?5 ?10 ?15 ?20 error (db) input (dbm) 06056-007 100mhz 450mhz 900mhz 1900mhz 2350mhz 2700mhz 4000mhz 5000mhz 6000mhz figure 7. linearity error vs. input level; frequencies = 100 mhz, 450 mhz, 900 mhz, 1900 mhz, 2350 mhz, 2700 mhz, 4000 mhz, 5000 mhz, and 6000 mhz; supply = 5.0 v 10 0.03 0.1 1 ?25 ?20 ?15 ?10 ?5 0 5 10 15 output (v) input (dbm) 5.5v 5.0v 2.7v 3.0v 06056-008 figure 8. output vs. input level; supply = 2.7 v, 3.0 v, 5.0 v, and 5.5 v; frequency = 900 mhz 30 25 20 15 10 5 06 4 2 1 return loss (db) frequency (ghz) 5 3 06056-009 figure 9. return loss vs. frequency
adl5501 rev. b | page 12 of 2 8 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 15 error (db) input (dbm) 06056-010 figure 10. temperature drift distributions for 50 devices at ?40c, +25c, and +85c vs. +25c linear reference; frequency = 900 mhz; supply = 5.0 v 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 15 error (db) input (dbm) 06056-011 figure 11. temperature drift distributions for 50 devices at ?40c, +25c, and +85c vs. +25c linear reference; frequency = 1900 mhz; supply = 5.0 v 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 15 error (db) input (dbm) 06056-012 figure 12. temperature drift distributions for 50 devices at ?40c, +25c, and +85c vs. +25c linear reference; frequency = 2350 mhz; supply = 5.0 v 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 15 error (db) input (dbm) 06056-013 figure 13. output delt a from +25c output voltage for 50 devices at ?40c and +85c, frequency = 900 mhz, supply = 5.0 v 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 15 error (db) input (dbm) 06056-014 figure 14. output delt a from +25c output voltage for 50 devices at ?40c and +85c, frequency = 1900 mhz, supply = 5.0 v 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 15 error (db) input (dbm) 06056-015 figure 15. output delt a from +25c output voltage for 50 devices at ?40c and +85c, frequency = 2350 mhz, supply = 5.0 v
adl5501 rev. b | page 13 of 28 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 15 error (db) input (dbm) 06056-016 figure 16. temperature drift distributions for 50 devices at ?40c, +25c, and +85c vs. +25c linear reference; frequency = 2700 mhz; supply = 5.0 v 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 15 error (db) input (dbm) 06056-018 figure 17. temperature drift distributions for 50 devices at ?40c, +25c, and +85c vs. +25c linear reference; frequency = 4000 mhz; supply = 5.0 v 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 15 error (db) input (dbm) 06056-018 figure 18. temperature drift distributions for 50 devices at ?40c, +25c, and +85c vs. +25c linear reference; frequency = 6000 mhz; supply = 5.0 v 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 15 error (db) input (dbm) 06056-019 figure 19. output delt a from +25c output voltage for 50 devices at ?40c and +85c, frequency = 2700 mhz, supply = 5.0 v 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 15 error (db) input (dbm) 06056-021 figure 20. output delt a from +25c output voltage for 50 devices at ?40c and +85c, frequency = 4000 mhz, supply = 5.0 v 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 15 error (db) input (dbm) 06056-021 figure 21. output delt a from +25c output voltage for 50 devices at ?40c and +85c, frequency = 6000 mhz, supply = 5.0 v
adl5501 rev. b | page 14 of 28 5 0.03 0.1 1 ?25 ?20 ?15 ?10 ?5 0 5 10 vout (v) input (dbm) cw qpsk 8psk 16qam 64qam 06056-022 figure 22. output vs. input level with different waveforms, 10 mhz signal bw for all modulated signals, supply = 5.0 v, frequency = 1900 mhz 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 error (db) rfin (dbm) cw bpsk, 11db cf qpsk, 11db cf 16qam, 12db cf 64qam, 11db cf 06056-023 figure 23. error from cw linear re ference vs. input level for various 802.16 ofdm waveforms at 2.35 ghz, 10 mhz signal bw, and 256 subcarriers for all modulated signals, supply = 5.0 v 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 error (db) rfin (dbm) cw 12.2kbps, dpcch (?5.46db, 15ksps) + dpdch (0db, 60ksps), 3.4db cf 64kbps, dpcch (?9.54db, 15ksps) + dpdch (0db, 240ksps), 3.4db cf 144kbps, dpcch (?11.48db, 15ksps) + dpdch (0db, 480ksps), 3.3db cf 384kbps, dpcch (?11.48db, 15ksps) + dpdch (0db, 960ksps), 3.3db cf 768kbps, dpcch (?11.48db, 15ksps) + dpdch1 + 2 (0db, 960ksps), 5.8db cf 06056-024 figure 24. error from cw linear reference vs. input with various wcdma up link waveforms at 1900 mhz, c fltr = open, c out = 100 nf 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 error (db) input (dbm) cw qpsk, 4.8db cf 8psk, 4.8db cf 16qam, 6.3db cf 64qam, 7.4db cf 06056-025 figure 25. error from cw linear reference vs. input with different waveforms, 10 mhz signal bw for all modulated signals, supply = 5.0 v, frequency = 1900 mhz 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 error (db) rfin (dbm) cw bpsk, 11db cf qpsk, 11db cf 16qam, 12db cf 64qam, 11db cf 06056-026 figure 26. error from cw linear re ference vs. input level for various 802.16 ofdm waveforms at 3.5 ghz, 10 mhz signal bw, and 256 subcarriers for all modulated signals, supply = 5.0 v 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 error (db) rfin (dbm) cw pich, 4.7db cf pich + fch (9.6kbps), 4.8db cf pich + fch (9.6kbps) + dcch, 6.3db cf pich + fch (9.6kbps) + sch (153.6kbps), 6.7db cf pich + fch (9.6kbps) + dcch + sch (153.6kbps), 7.6db cf 06056-027 figure 27. error from cw linear reference vs. input with various cdma2000 reverse link waveforms at 900 mhz, c fltr = 1 nf, c out = 100 nf
adl5501 rev. b | page 15 of 28 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 error (db) rfin (dbm) cw test model 1 w/ 16 dpch, 1 carrier test model 1 w/ 32 dpch, 1 carrier test model 1 w/ 64 dpch, 1 carrier test model 1 w/ 64 dpch, 2 carriers test model 1 w/ 64 dpch, 3 carriers test model 1 w/ 64 dpch, 4 carriers 06056-028 figure 28. error from cw linear reference vs. input with various wcdma down link waveforms at 2140 mhz, c fltr = 1 nf, c out = 100 nf 1 6 2 5 3 4 adl5501 vpos fltr rfin vrms enbl comm power supply rf pulse generator c1 100pf c2 0.1f c fltr oscilloscope fet probe r out c out 06056-029 figure 29. hardware configuration for output response to rf input pulse 10s/div vrms (500mv/div) 06056-030 400mv rms rf input 250mv rms 160mv rms 70mv rms pulsed rfin figure 30. output response to various rf input pulse levels, supply = 3 v, frequency = 900 mhz, c fltr = open, c out = open, r out = open 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 error (db) input (dbm) cw sr1, pilot channel, 1 carrier sr1, 9 channel, 1 carrier sr1, 9 channel, 3 carriers sr1, 9 channel, 4 carriers 06056-031 figure 31. error from cw linear reference vs. input with various cdma2000 fwd link waveforms at 2140 mhz, c fltr = 1 nf, c out = 100 nf 40s/div vrms (500mv/div) 06056-032 400mv rms rf input 250mv rms 160mv rms 70mv rms pulsed rfin figure 32. output response to various rf input pulse levels, supply = 3 v, frequency = 900 mhz, c fltr = 1 nf, c out = open, r out = open 100s/div vrms (500mv/div) 06056-033 pulsed rfin 400mv rms rf input 250mv rms 160mv rms 70mv rms figure 33. output response to various rf input pulse levels, supply = 3 v, frequency = 900 mhz, c fltr = open, c out = 0.1 f, r out = 1 k
adl5501 rev. b | page 16 of 28 1 6 2 5 3 4 adl5501 vpos fltr rfin vrms enbl comm power supply rf signal generator pulse generator c1 100pf c2 0.1f c fltr oscilloscope fet probe r out c out ad811 732 ? 50? 0 6056-034 figure 34. hardware configuration for output response to enable gating measurements 10s/div vrms (500mv/div) 06056-035 400mv rms rf input 250mv rms 160mv rms 70mv rms enbl figure 35. output response to enable gating at various rf input levels, supply = 3 v, frequency = 900 mhz, c fltr = open, c out = open, r out = open 8 0 1 3 5 6 7 0 2000 4000 6000 conversion gain (v/v rms) frequency (mhz) 2 4 06056-036 figure 36. conversion gain vs. frequency, supply 5 v 40s/div vrms (500mv/div) 06056-037 400mv rms rf input 250mv rms 160mv rms 70mv rms enbl figure 37. output response to enable gating at various rf input levels, supply = 3 v, frequency = 900 mhz, c fltr = 1 nf, c out = open, r out = open 100s/div vrms (500mv/div) 06056-038 enbl 400mv rms rf input 250mv rms 160mv rms 70mv rms figure 38. output response to enable gating at various rf input levels, supply = 3 v, frequency = 900 mhz, c fltr = open, c out = 0.1 f, r out = 1 k 100 0 20 40 60 80 90 10 30 50 70 0 2000 4000 6000 intercept (mv) frequency (mhz) 06056-039 figure 39. intercept vs. frequency, supply = 5 v
adl5501 rev. b | page 17 of 28 circuit description the adl5501 is an rms-responding (mean power) detector that provides an approach to the exact measurement of rf power that is independent of waveform. it achieves this function by using a proprietary technique in which the outputs of two identical squaring cells are balanced by the action of a high gain error amplifier. the signal to be measured is applied to the input of the first squaring cell through the input matching network. the input is matched to offer a broadband 50 input impedance from 50 mhz to 6 ghz. the input matching network has a high-pass corner frequency of approximately 70 mhz. the adl5501 responds to the voltage, v in , at its input by squaring this voltage to generate a current proportional to v in 2 . this current is applied to an internal load resistor in parallel with a capacitor, followed by a low-pass filter, which extracts the mean of v in 2 . although essentially voltage responding, the associated input impedance calibrates this port in terms of equivalent power. therefore, 1 mw corresponds to a voltage input of 224 mv rms referenced to 50 . because both the squaring cell input impedance and the input matching network are frequency dependent, the conversion gain is a function of signal frequency. the voltage across the low-pass filter, whose frequency can be arbitrarily low, is applied to one input of an error-sensing amplifier. a second identical voltage-squaring cell is used to close a negative feedback loop around this error amplifier. this second cell is driven by a fraction of the quasi-dc output voltage of the adl5501. when the voltage at the input of the second squaring cell is equal to the rms value of v in , the loop is in a stable state, and the output then represents the rms value of the input. by completing the feedback path through a second squaring cell, identical to the one receiving the signal to be measured, several benefits arise. first, scaling effects in these cells cancel; therefore, the overall calibration can be accurate, even though the open-loop response of the squaring cells taken separately need not be. note that in implementing rms-dc conversion, no reference voltage enters into the closed-loop scaling. second, the tracking in the responses of the dual cells remains very close over temperature, leading to excellent stability of calibration. the squaring cells have very wide bandwidth with an intrinsic response from dc to microwave. however, the dynamic range of such a system is small, due in part to the much larger dynamic range at the output of the squaring cells. there are practical limitations to the accuracy of sensing very small error signals at the bottom end of the dynamic range, arising from small random offsets that limit the attainable accuracy at small inputs. on the other hand, the squaring cells in the adl5501 have a class ab aspect; the peak input is not limited by its quiescent bias condition but is determined mainly by the eventual loss of square-law conformance. consequently, the top end of their response range occurs at a large input level (approximately 700 mv rms), while preserving a reasonably accurate square-law response. the maximum usable range is, in practice, limited by the output swing. the rail-to-rail output stage can swing from a few millivolts above ground to within 100 mv below the supply. an example of the output induced limit, given a conversion gain of 6.3 v/v rms at 900 mhz and assuming a maximum output of 2.9 v with a 3 v supply, has a maximum input of 2.9 v rms/6.3 or 460 mv rms. filtering an important aspect of rms-dc conversion is the need for averaging (the function is root-mean-square). the on-chip averaging in the square domain has a corner frequency of approximately 100 khz and is sufficient for common modu- lation signals, such as cdma-, cdma2000-, wcdma-, and qpsk-/qam-based ofdm (for example, wlan and wimax). for more complex rf waveforms (with modulation components extending down into the kilohertz region), more filtering is necessary to supplement the on-chip, low-pass filter. for this reason, the fltr pin is provided; a capacitor attached between this pin and vpos can extend the averaging time to very low frequencies. adequate filtering ensures the accuracy of the rms measurement; however, some ripple or ac residual can still be present on the dc output. to reduce this ripple, an external shunt capacitor can be used at the output to form a low-pass filter with the on-chip, 100 resistance (see the selecting the square-domain filter and output low-pass filter section).
adl5501 rev. b | page 18 of 28 applications information basic connections figure 40 shows the basic connections for the adl5501. the device is powered by a single supply of between 2.7 v and 5.5 v, with a quiescent current of 1.1 ma. the vpos pin is decoupled using 100 pf and 0.1 f capacitors. the adl5501 rf input does not require external termination components because it is internally matched for an overall broadband input impedance of 50 . 1 6 2 5 3 4 adl5501 vpos fltr rfin vrms enbl comm c fltr rfin c out vrms 100p f 0.1f + v s 2.7 v to 5.5v 06056-040 figure 40. basic connections for the adl5501 output swing at 900 mhz, the output voltage is nominally 6.3 times the input rms voltage (a conversion gain of 6.3 v/v rms). the output voltage swings from near ground to 4.9 v on a 5.0 v supply. figure 41 shows the output swing of the adl5501 to a cw input for various supply voltages. it is clear from figure 41 that operating the device at lower supply voltages reduces the dynamic range as the output headroom decreases. 10 0.03 0.1 1 ?25 ?20 ?15 ?10 ?5 0 5 10 15 output (v) input (dbm) 5.5v 5.0v 2.7v 3.0v 06056-041 figure 41. output swing for supply voltages of 2.7 v, 3.0 v, 5.0 v, and 5.5 v linearity because the adl5501 is a linear-responding device, plots of output voltage vs. input voltage result in a straight line. it is more useful to plot the error on a logarithmic scale, as shown in figure 42 . the deviation of the plot for the ideal straight-line characteristic is caused by output clipping at the high end and by signal offsets at the low end. however, it should be noted that offsets at the low end can be either positive or negative; therefore, this plot could also trend upwards at the low end. figure 10 through figure 12 and figure 16 through figure 18 show error distributions for a large population of devices at specific frequencies. 3 2 1 0 ?1 ?2 ?3 ?25 15 10 50 ?5 ?10 ?15 ?20 error (db) input (dbm) 06056-107 100mhz 450mhz 900mhz 1900mhz 2350mhz 2700mhz 4000mhz 5000mhz 6000mhz figure 42. representative unit, error in db vs. input level, v s = 5.0 v it is also apparent in figure 42 that the error plot tends to shift to the right with increasing frequency. the squaring cell has an input impedance that decreases with frequency. the matching network compensates for the change and maintains the input impedance at a nominal 50 . the result is a decrease in the actual voltage across the squaring cell as the frequency increases, reducing the conversion gain. similarly, conversion gain is less at frequencies near 100 mhz because of the small on-chip coupling capacitor.
adl5501 rev. b | page 19 of 28 input coupling using a series resistor figure 43 shows a technique for coupling the input signal into the adl5501 that can be applicable where the input signal is much larger than the input range of the adl5501. a series resistor combines with the input impedance of the adl5501 to attenuate the input signal. because this series resistor forms a divider with the frequency dependent input impedance, the apparent gain changes greatly with frequency. however, this method has the advantage of very little power being tapped off in rf power transmission applications. if the resistor is large compared to the impedance of the transmission line, the vswr of the system is relatively unaffected. adl5501 rfin rfin r series 06056-043 figure 43. attenuating the input signal the resistive tap or series resistance, r series , can expressed as r series = r in (1 ? 10 attn /20 )/(10 attn /20 ) (1) where: r in is the input impedance of rfin. at tn is the desired attenuation factor in db. for example, if a power amplifier with a maximum output power of +28 dbm is matched to the adl5501 input at +5 dbm, then a ?23 db attenuation factor is required. at 900 mhz, the input resistance, r in , is 55 . r series = (55 ) (1 ? 10 ?23/20 )/(10 ?23/20 ) = 722 thus, for an attenuation of ?23 db, a series resistance of approximately 722 is needed. multiple rf inputs figure 44 shows a technique for combining multiple rf input signals to the adl5501. some applications can share a single detector for multiple bands. three 16.5 resistors in a t-network combine the three 50 terminations (including the adl5501). the broadband resistive combiner ensures that each port of the t-network sees a 50 termination. because there are only 6 db of isolation from one port of the combiner to the other ports, only one band should be active at a time. adl5501 rfin band 1 50? band 2 directional coupler 16.5 ? 50? 16.5 ? 16.5 ? directional coupler 06056-044 figure 44. combining multiple rf input signals selecting the square-domain filter and output low-pass filter the internal filter capacitor of the adl5501 provides averaging in the square domain but leaves some residual ac on the output. signals with high peak-to-average ratios, such as w-cdma or cdma2000, can produce ac-residual levels on the adl5501 dc output. to reduce the effects of these low frequency components in the waveforms, some additional filtering is required. the square-domain filter capacitance of the adl5501 can be augmented by connecting a capacitor between pin 2 (fltr) and pin 1 (vpos). in addition, the output of the adl5501 can be filtered directly by placing a capacitor between vrms (pin 6) and ground. the combination of the on-chip, 100 output series resistance and the external shunt capacitor forms a low- pass filter to reduce the residual ac. table 4 shows the effects of several capacitor values for various communications standards with high peak-to-average ratios along with the residual ripple at the output, in peak-to-peak and rms volts. note that large load capacitances increase the turn-on and pulse response times (see figure 30 , figure 32 , figure 33 , figure 35 , figure 37 , and figure 38 ). for more information on the effects of the filter capacitances on the response, see the power consumption, enable, and power-on/power-off response time section.
adl5501 rev. b | page 20 of 2 8 table 4. waveform and output filter effects on residual ac output residual ac waveform c filt , c out v dc mv p-p mv rms 64qam 1 nf, 0.5 83 11 (7.4 db cf) open 1.0 175 21 2.0 394 47 open, 0.5 49 5.5 0.1 f 1.0 98 11 2.0 212 23 1 nf, 0.5 45 5.5 0.1 f 1.0 93 11 2.0 200 24 w-cdma rl 1 nf, 0.5 6.4 0.8 (3.4 db cf) open 1.0 19 2.6 2.0 52 6.6 open, 0.5 4.5 0.6 0.1 f 1.0 16 2.2 2.0 36 4.9 1 nf, 0.5 3.1 0.5 0.1 f 1.0 9.6 1.4 2.0 27 3.9 cdma2000 dl 1 nf, 0.5 67 8.6 (6.7 db cf) open 1.0 148 19 2.0 339 43 open, 0.5 28 3.9 0.1 f 1.0 56 7.9 2.0 119 17 1 nf, 0.5 26 3.7 0.1 f 1.0 52 7.7 2.0 116 17 w-cdma ul 1 nf, 0.5 204 32 tm1-64, 1 cr open 1.0 396 64 2.0 840 140 open, 0.5 60 11 0.1 f 1.0 112 21 2.0 227 42 1 nf, 0.5 56 11 0.1 f 1.0 114 21 2.0 243 45 power consumption, enable, and power- on/power-off response time the quiescent current consumption of the adl5501 varies with the size of the input signal from approximately 1.1 ma for no signal up to 6.2 ma at an input level of 0.7 v rms (10 dbm, re: 50 ). if the input is driven beyond this point, the supply current increases sharply (as shown in figure 6 ). there is little variation in quiescent current with power supply voltage. the adl5501 can be disabled either by pulling enbl (pin 5) to comm (pin 4) or by removing the supply power to the device. disabling the device via the enbl function reduces the leakage current to less than 1 a. if the input of the adl5501 is driven while the device is disabled (enbl = comm), the leakage current of less than 1 a increases as a function of input level. when the device is disabled, the output impedance increases to approximately 33.5 k. the turn-on time and pulse response is strongly influenced by the size of the square-domain filter and output shunt capacitor. figure 45 shows a plot of the output response to an rf pulse on the rfin pin, with a 0.1 f output filter capacitor and no square-domain filter capacitor. the falling edge is particularly dependent on the output shunt capacitance, as shown in figure 45 . 2ms/div vrms (500mv/div) 400mv rms rf input 250mv rms 160mv rms 70mv rms pulsed rfin 06056-045 figure 45. output response to various rf input pulse levels, supply = 3 v, frequency = 900 mhz, square-domain filter open, output filter = 0.1 f to improve the falling edge of the enable and pulse responses, a resistor can be placed in parallel with the output shunt capacitor. the added resistance helps to discharge the output filter capacitor. although this method reduces the power-off time, the added load resistor also attenuates the output (see the output drive capability and buffering section). 2ms/div vrms (500mv/div) 400mv rms rf input 250mv rms 160mv rms 70mv rms pulsed rfin 06056-046 figure 46. output response to various rf input pulse levels, supply = 3 v, frequency = 900 mhz, square-domain filter open, output fi lter = 0.1 f with parallel 1 k the square-domain filter improves the rms accuracy for high crest factors (see the selecting the square-domain filter and output low-pass filter section), but it can hinder the response time. for optimum response time and low ac residual, both the square-domain filter and the output filter should be used.
adl5501 rev. b | page 21 of 2 8 the square-domain filter at fltr can be reduced to improve response time, and the remaining ac residual can be decreased by using the output filter, which has a smaller time constant. output drive capability and buffering the adl5501 is capable of sourcing an output current of approx- imately 3 ma. the output current is sourced through the on-chip, 100 series resistor; therefore, any load resistor forms a voltage divider with this on-chip resistance. it is recommended that the adl5501 drive high resistive loads to preserve output swing. if an application requires driving a low resistance load, a simple buffering circuit can be used, as shown in figure 49 . similar circuits can be used to increase or decrease the nominal conversion gain (see figure 47 and figure 48 ). in figure 48 , the ad8031 buffers a resistive divider to give half of the slope. in figure 47 , the op amp gain of two doubles the slope. using other resistor values, the slope can be changed to an arbitrary value. the ad8031 rail-to-rail op amp, used in these examples, can swing from 50 mv to 4.95 v on a single 5 v supply and operates at supply voltages down to 2.7 v. if high output current is required (>10 ma), the ad8051 , which also has rail-to-rail capability, can be used down to a supply voltage of 3 v. it can deliver up to 45 ma of output current. 100pf 0.1f 0.01f adl5501 vrms vpos comm 5k ? 5k? 5 v 12.6v/v rms ad8031 06056-047 figure 47. output buffering options, slope of 12.6 v/v rms at 900 mhz 100pf 0.1f 0.01f adl5501 vrms vpos comm 5 v 3.2v/v rms ad8031 4k? 5k? 0 6056-048 figure 48. output buffering options, slope of 3.2 v/v rms at 900 mhz 100pf 0.1f 0.01f adl5501 vrms vpos comm 5 v 6.3v/v rms ad8031 0 6056-049 figure 49. output buffering options, slope of 6.3 v/v rms at 900 mhz vrms output offset the adl5501 has a 1 db error detection range of about 30 db, as shown in figure 10 to figure 12 and figure 16 to figure 18 . the error is referred to the best-fit line defined in the linear region of the output response. below an input power of ?20 dbm, the response is no longer linear and begins to lose accuracy. in addi- tion, depending on the supply voltage, saturation of the output limits the detection accuracy above 10 dbm. calibration points should be chosen in the linear region, avoiding the nonlinear ranges at the high and low extremes. figure 50 shows the distribution of the output response vs. the input power for multiple devices. the adl5501 loses accuracy at low input powers as the output response begins to fan out. as the input power is reduced, the spread of the output response increases along with the error. although some devices follow the ideal linear response at very low input powers, not all devices continue the ideal linear regression to a near 0 v y-intercept. some devices exhibit output responses that rapidly decrease, and some flatten out. with no rf signal applied, the adl5501 has a typical output offset of 50 mv (with a maximum of 150 mv). 10 0.01 0.1 1 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 5 10 15 output (v) input (dbm) 06056-050 figure 50. output vs. input level distribution of 50 devices, frequency = 900 mhz, supply = 5.0 v
adl5501 rev. b | page 22 of 2 8 device calibration and error calculation because slope and intercept vary from device to device, board- level calibration must be performed to achieve high accuracy. in general, calibration is performed by applying two input power levels to the adl5501 and measuring the corresponding output voltages. the calibration points are generally chosen to be within the linear operating range of the device. the best-fit line is char- acterized by calculating the conversion gain (or slope) and intercept using the following equations: gain = ( v rms2 ? v rms1 )/( v in2 ? v in1 ) (2) intercept = v rms1 ? ( gain v in1 ) (3) where: v in is the rms input voltage to rfin. v rms is the voltage output at vrms. after gain and intercept are calculated, an equation can be written that allows calculation of an (unknown) input power based on the measured output voltage. v in = ( v rms ? intercept )/ gain (4) for an ideal (known) input power, the law conformance error of the measured data can be calculated as error (db) = 20 log [(v rms, measured ? intercept )/( gain v in, ideal )] (5) figure 51 includes a plot of the error at 25c, the temperature at which the adl5501 is calibrated. note that the error is not zero; this is because the adl5501 does not perfectly follow the ideal linear equation, even within its operating region. the error at the calibration points is, however, equal to zero by definition. 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 +85c +25c ?40c 10 15 error (db) input (dbm) 06056-051 figure 51. error from linear reference vs. input at ?40c, +25c, and +85c vs. +25c linear reference, frequency = 1900 mhz, supply = 5.0 v figure 51 also includes error plots for the output voltage at ?40c and +85c. these error plots are calculated using the gain and intercept at +25c. this is consistent with calibra- tion in a mass-production environment where calibration at temperature is not practical. calibration for improved accuracy another way of presenting the error function of the adl5501 is shown in figure 52 . in this case, the db error at hot and cold temperatures is calculated with respect to the transfer function at ambient. this is a key difference in comparison to the previous plots. up until now, the errors were calculated with respect to the ideal linear transfer function at ambient. when this alterna- tive technique is used, the error at ambient becomes equal to zero by definition (see figure 52 ). 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 +85c +25c ?40c 10 15 error (db) input (dbm) 06056-052 figure 52. error from +25c output voltage at ?40c, +25c, and +85c after ambient normalization, frequency = 1900 mhz, supply = 5.0 v this plot is a useful tool for estimating temperature drift at a particular power level with respect to the (nonideal) response at ambient. the linearity and dynamic range tend to be improved artificially with this type of plot because the adl5501 does not perfectly follow the ideal linear equation (especially outside of its linear operating range). achieving this level of accuracy in an end application requires calibration at multiple points in the operating range of the device. in some applications, very high accuracy is required at just one power level or over a reduced input range. for example, in a wire- less transmitter, the accuracy of the high power amplifier (hpa) is most critical at or close to full power. the adl5501 offers a tight error distribution in the high input power range, as shown in figure 52 . the high accuracy range, centered around 9 dbm at 1900 mhz, offers 7 db of 0.1 db detection error over temperature. multiple point calibration at ambient temperature in the reduced range offers precise power measurement with near 0 db error from ?40c to +85c. the high accuracy range center varies over frequency. at 1900 mhz, the region is centered at approximately 9 dbm. at higher frequencies, the high accuracy range is centered at higher input powers (see figure 13 through figure 15 and figure 19 through figure 21 ).
adl5501 rev. b | page 23 of 2 8 drift over a reduced temperature range due to the repeatability of the performance from part to part, compensation can be applied to reduce the effects of temperature drift and linearity error. to detect larger dynamic ranges at lower frequencies, the transfer function at ambient can be calibrated, thus eliminating the linearity error. this technique is discussed in detail in the calibration for improved accuracy section. figure 55 shows that the dynamic range within 0.5 db error improves to 30 db by using this method. figure 53 shows the error over temperature for a 1.9 ghz input signal. error due to drift over temperature consistently remains within 0.25 db and begins to exceed this limit only when the ambient temperature goes above +25c and below ?10c. for all frequencies using a reduced temperature range, higher measurement accuracy is achievable. 1.00 ?1.00 ?0.75 ?0.50 ?0.25 0 0.25 0.50 0.75 ?25 ?20 ?15 ?10 ?5 0 5 10 15 error (db) input (dbm rms) 06056-100 +85c +70c +50c +35c +25c +15c 0c ?10c ?25c ?40c 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 15 error (db) input (dbm) 06056-054 figure 53. typical drift at 1.9 ghz for various temperatures figure 55. output delta from +25c output voltage for 12 devices at ?40c and +85c, frequency = 50 mhz, supply = 5.0 v operation below 100 mhz the adl5501 works at frequencies below 100 mhz but exhibits a slightly higher linearity error. figure 54 shows the error distribution of 12 devices at 50 mhz over temperature. when compared to an ideal linear transfer function at ambient, the error of the adl5501 over temperature remains within 0.5 db for the central 20 db of the dynamic range. at the higher input power levels, the error grows as the response becomes nonlinear. the typical slope and intercept at 50 mhz are 4.5 v/v rms and 0.04 v, respectively. evaluation board figure 56 shows the schematic of the adl5501 evaluation board. the layout and silkscreen of the evaluation board layers are shown in figure 57 and figure 58 . the board is powered by a single supply in the 2.7 v to 5.5 v range. the power supply is decoupled by 100 pf and 0.1 f capacitors. table 5 details the various configuration options of the evaluation board. problems caused by impedance mismatch can arise when the evaluation board is used to examine adl5501 performance. one way to reduce these problems is to put a coaxial 3 db atten- uator on the rfin sma connector. mismatches at the source, cable, and cable interconnection, as well as those occurring on the evaluation board, can cause these problems. 3 ?3 ?2 ?1 0 1 2 ?25 ?20 ?15 ?10 ?5 0 5 10 15 error (db) input (dbm) 06056-053 a simple (and common) example of such a problem is triple travel due to mismatch at both the source and the evaluation board. here the signal from the source reaches the evaluation board, and mismatch causes a reflection. when that reflection reaches the source mismatch, it causes a new reflection, which travels back to the evaluation board, adding to the original signal incident at the board. the resulting voltage varies with both cable length and frequency dependence on the relative phase of the initial and reflected signals. placing the 3 db pad at the input of the board improves the match at the board and, thus, reduces the sensitivity to mismatches at the source. when such precau- tions are taken, measurements are less sensitive to cable length and other fixture issues. in an actual application when the distance between the adl5501 and the source is short and well defined, this 3 db attenuator is not needed. figure 54. temperature drift distributions for 12 devices at ?40c, +25c, and +85c vs. +25c linear reference, frequency = 50 mhz, supply = 5.0 v
adl5501 rev. b | page 24 of 2 8 1 6 2 5 3 4 adl5501 vpos fltr rfin vrms enbl comm c3 (open) rfin vrms r3 0 ? r5 (open) r1 (open) vpos c1 100pf c2 0.1f r2 (open) r4 49.9 ? c4 100nf to edge connector to edge connector sw1 vpos enbl 0 6056-056 figure 56. evaluation board schematic table 5. evaluation board configuration options component description default condition gnd, vpos ground and supply vector pins. not applicable c1, c2 power supply decoupling. the nominal supply decoupling of 100 pf and 0.1 f. c1 = 100 pf (size 0402) c2 = 0.1 f (size 0402) c3 filter capacitor. the internal averaging capacitor can be augmented by placing additional capacitance in c3. c3 = open (size 0402) r2, r3, c4 output filtering. the combination of the internal 100 output resistance and c4 produces a low- pass filter to reduce output ripple. the output can also be scaled down using the resistor divider pads, r3 and r2. in addition, resistors and capacitors can be placed in c4 and r2 to load test vrms. r2 = open (size 0402) r3 = 0 (size 0402) c4 = 100 nf (size 0402) r4, sw1 device enable. when the switch is set toward the sw1 label, the enbl pin is connected to vpos, and the adl5501 is in operating mode. in the opposite switch position, the enbl pin is grounded (through the 49.9 resistor), putting the device in power-down mode. while in this switch position, the enbl pin can be driven by a signal generator via the sma labeled enbl. in this case, r4 serves as a termination resistor for generators requiring a 50 match. r4 = 49.9 (size 0402) sw1 = toward sw1 label r1, r5 alternate interface. r1and r5 allow for vrms and enbl to be accessible from the edge connector, which is used only for characterization. r1 = open (size 0402) r5 = open (size 0402) 06056-057 figure 57. layout of evaluation board, component side 0 6056-058 figure 58. layout of evaluation board, circuit side
adl5501 rev. b | page 25 of 2 8 outline dimensions compliant to jedec standards mo-203-ab 0.22 0.08 0.30 0.15 1.00 0.90 0.70 seating plane 4 5 6 3 2 1 pin 1 0.65 bsc 1.30 bsc 0.10 max 0.10 coplanarity 0.40 0.10 1.10 0.80 2.20 2.00 1.80 2.40 2.10 1.80 1.35 1.25 1.15 0.46 0.36 0.26 figure 59. 6-lead thin shrink small outline transistor package [sc-70] (ks-6) dimensions shown in millimeters ordering guide model temperature range package desc ription package option branding ordering quantity adl5501aksz-r7 1 C40c to +85c 6-lead sc-70, 7 tape and reel ks-6 q0z 3,000 adl5501aksz-r2 1 C40c to +85c 6-lead sc-70, 7 tape and reel ks-6 q0z 250 adl5501-evalz 1 evaluation board 1 z =rohs compliant part.
adl5501 rev. b | page 26 of 2 8 notes
adl5501 rev. b | page 27 of 2 8 notes
adl5501 rev. b | page 28 of 28 notes ?2006C2009 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d06056-0-3/09(b)

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